![Table 4 from Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits | Semantic Scholar Table 4 from Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits | Semantic Scholar](https://d3i71xaburhd42.cloudfront.net/1597f3a1a4b8481427dc3d6d6381f0c1307398d9/3-Table4-1.png)
Table 4 from Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits | Semantic Scholar
![Implement the following logic function using all 4:1 multiplexers with select inputs as 'B','C','D','E' only $F(A,B,C,D,E) = \sum m(0,1,2,3,6,8,9,10,13,15,17,20,24,30)$. Implement the following logic function using all 4:1 multiplexers with select inputs as 'B','C','D','E' only $F(A,B,C,D,E) = \sum m(0,1,2,3,6,8,9,10,13,15,17,20,24,30)$.](https://i.imgur.com/K9sYu6n.png)
Implement the following logic function using all 4:1 multiplexers with select inputs as 'B','C','D','E' only $F(A,B,C,D,E) = \sum m(0,1,2,3,6,8,9,10,13,15,17,20,24,30)$.
![16X1 MULTIPLEXER USING 8X1 MULTIPLEXER in simple way | In Hindi | Electronics Subjectified - YouTube 16X1 MULTIPLEXER USING 8X1 MULTIPLEXER in simple way | In Hindi | Electronics Subjectified - YouTube](https://i.ytimg.com/vi/DsywMRoomG4/maxresdefault.jpg)
16X1 MULTIPLEXER USING 8X1 MULTIPLEXER in simple way | In Hindi | Electronics Subjectified - YouTube
1. Draw a block diagram, truth table and logic circuit of a 16 x 1 multiplexer and explain its working principle.
![digital logic - Block diagram of 16:1 MUX using four 4:1 MUX only - Electrical Engineering Stack Exchange digital logic - Block diagram of 16:1 MUX using four 4:1 MUX only - Electrical Engineering Stack Exchange](https://i.stack.imgur.com/mRESO.jpg)